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Low-Latency Engineer

RemoteFull-timeSeniorPosted: April 28, 2026

About the Role

Execution speed is a strategic asset at Uncharted Network. As a Low-Latency Engineer, you will own the nanosecond-critical path from signal receipt to order placement — engineering kernel-bypass networking stacks, lock-free data structures, and cache-aware memory layouts that keep us competitive across every exchange session. This is not theoretical systems work: we measure and act on single-digit microsecond improvements, and you will have the profiling tooling and live production traffic to validate every hypothesis. If you think in NUMA topology and cache lines, you will find this environment demanding and deeply satisfying.

Responsibilities

  • Design and maintain the kernel-bypass networking layer for market data ingestion and order routing using DPDK, Solarflare, or equivalent
  • Implement lock-free queues, ring buffers, and shared-memory IPC between trading engine components
  • Profile and reduce latency on the critical execution path from tick receipt to exchange order submission
  • Conduct cache-aware data structure design and memory layout optimisation for all hot-path components
  • Benchmark, measure, and document latency improvements with rigorous statistical methodology
  • Collaborate with quantitative traders and trading systems engineers to co-design latency-sensitive modules

Requirements

  • 5+ years of systems engineering experience with demonstrable low-latency C++ in production
  • Expert-level C++20 proficiency: templates, move semantics, constexpr, and compile-time optimisation techniques
  • Hands-on experience with DPDK, eBPF, or kernel-bypass networking frameworks
  • Deep understanding of Linux internals: scheduler, memory model, NUMA, hugepages, and CPU affinity
  • Experience profiling with perf, Valgrind, and vendor tooling; comfortable reading and optimising assembly output
  • Strong understanding of lock-free programming and concurrent data structure design

Nice to Have

  • Experience with FPGA prototyping for market-data preprocessing or hardware timestamping
  • Knowledge of exchange co-location environments and proprietary feed handler development
  • Familiarity with Rust for safe system-level components alongside C++
What We Offer
  • Competitive UNT token allocation + fiat salary
  • Fully remote with async-first culture
  • Direct ownership of the firm's most latency-sensitive execution infrastructure
  • Top-tier hardware setup stipend
  • Annual performance-engineering conference and technical learning budget
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